Akash Banerjee

Akash Banerjee

Staff Compiler Engineer at AMD · LLVM/MLIR · C++ Systems

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About Me

Hello! I’m Akash, a staff compiler engineer at AMD in the UK. I work on OpenMP target offload in LLVM Flang and MLIR, from Fortran lowering and OpenMP dialect design through LLVM IR generation.

My main focus is data mapping: target-data constructs, user-defined and default declare mappers, and derived-type semantics. I have also helped move reusable offload code generation from Clang into OpenMPIRBuilder, allowing Clang and MLIR-based frontends to share the same implementation.

My background also includes performance engineering, program analysis and formal verification. I’m always happy to chat about compilers, open source or interesting systems problems.

When I’m not coding, you can find me losing at DOTA 2, staring at my fish tanks, or giving pats to Simba (OTRB). I’m also learning photography 🙂

Skills

Programming

  • C++ (primary), C and Python
  • Working knowledge of Rust, Java, JavaScript and C#

Frameworks & Tools

  • LLVM, MLIR, Flang, OpenMP and OpenMPIRBuilder
  • FIR/LLVM dialect conversion and LLVM IR translation
  • Git, GDB, LLDB and LaTeX

Systems

  • OpenMP target offload and data mapping
  • AMDGPU lowering and runtime interfaces
  • Regression testing, CI/CD and build infrastructure

Analysis

  • Program analysis and formal verification
  • CPROVER, symbolic execution and SAT solving

Publications

Implementing OpenMP Offload Support in the AMD Next Generation Fortran Compiler

SC Workshops ’25 · ACM · November 2025

Dominik Adamski, Sergio Afonso, Akash Banerjee, et al. Proceedings of the SC ’25 Workshops, pp. 1028–1038. The paper describes the architecture and implementation of OpenMP target offload in LLVM Flang.

Read on ACM Digital Library

Projects

OpenMP Data Mapping & Declare Mappers

2023–Present · Flang/MLIR/LLVM

Developed the OpenMP MLIR mapping representation and end-to-end declare-mapper support across Flang lowering, FIR conversion and LLVM IR translation. This includes explicit user mappers, implicit default mappers and derived-type component mapping.

LLVM contributions

OpenMP Mapping Semantics & Diagnostics

2026 · Flang/MLIR

Fixed mapper attachment and recursive emission for partial maps and nested types, tightened implicit-mapper rules for pointer captures and data-motion directives, and added diagnostics for unsafe descriptor mappings.

LLVM contributions

Inferred & Derived-Type Mapping

2025 · Flang/MLIR

Implemented AUTOMAP lowering and an FIR pass that converts inferred mappings into explicit target-data operations, then extended implicit mapping to nested allocatable components of Fortran derived types.

LLVM contributions

AMDGPU Complex-Type & Math Lowering

2025 · Flang/MLIR/ROCDL

Added AMDGPU handling for complex function arguments and results, together with complex operations and ROCDL lowerings required by Flang workloads.

LLVM contributions

Shared OpenMP Offload Code Generation

2022–2024 · Clang/OpenMPIRBuilder/MLIR

Migrated reusable offload code generation from Clang into OpenMPIRBuilder, including target-data calls, mapping arrays and descriptors, device privatisation, GPU reductions and mapper emission. These paths are reused by Clang and MLIR-based frontends.

LLVM contributions

OpenMP Target-Data Constructs in Flang/MLIR

2023 · Flang/MLIR/OpenMPIRBuilder

Added operations and end-to-end lowering for target data, target enter data and target exit data, spanning Flang lowering, FIR-to-LLVM conversion and OpenMPIRBuilder translation, together with map support for target regions.

LLVM contributions

Proteus: Polymorphic Compilation

Jun 2021

Developed a compiler tool using polymorphic compilation and execution techniques to mitigate a class of side‑channel attacks with minimal performance overhead. Part of my master's thesis project.

BPI Enhancements

Apr 2020

Proposed and implemented improvements to the Branch Probability Information pass in LLVM to allow better static profiling. The enhancements led to speed‑ups of up to 1.07× and were accepted as a poster at EuroLLVM 2020.

Source Poster

Loop Acceleration

Oct 2019

Added a loop acceleration module to the Pinaka verifier for quick detection of counterexamples in loops simulating polynomial functions. Pinaka won the third‑fastest verifier position in SV‑COMP’20 Floats sub‑category.

Source

LLVM2GOTO

Sep 2019

Created a tool to translate LLVM IR to CBMC‑GOTO. This allows verification of programs that have LLVM front‑ends by translating their IR into GOTO IR and verifying them with CBMC.

Source

COOL Compiler

Aug 2019

Designed and implemented a compiler for the COOL language to generate LLVM IR as part of the Advanced Compiler Design course project.

SAT Solvers

Mar 2019

Implemented DPLL, CDCL, and MaxSAT solvers with various heuristics and techniques such as MOMS, lazy data structures, and watch literals as part of the Constraint Programming course project.

Source

Hybrid Mutual Exclusion

Nov 2018

Implemented a hybrid mutual exclusion algorithm for distributed systems by combining Raymond’s and Maekawa’s algorithms, multiplexing between them based on load, latency, and throughput.

Source

Thin Slicing in GOTO

Nov 2018

Implemented thin‑slicing in CBMC‑GOTO to aid debugging of large programs by presenting only relevant sections of code, improving focus and efficiency.

Bitcoin Wallet

Oct 2018

Developed a Bitcoin wallet application capable of creating and managing BTC addresses with support for single and multisig authorization. Completed for the Blockchain Theory & Practice course.

Source

Get in touch

Address

United Kingdom